How to Control the Speed of a DC Motor Using Pulse-Width Modulation?

By IKTech July 8, 2017

Heartbeat width balance (PWM) or obligation cycle variety strategies are usually utilized as a part of speed control of DC engines. The obligation cycle is characterized as the rate of advanced “high” to computerized “low” in addition to computerized “high” heartbeat width amid a PWM period. Fig. 1 demonstrates the 5V beats with 0% through half obligation cycle.


The normal DC voltage esteem for 0% obligation cycle is zero; with 25% obligation cycle the normal esteem is 1.25V (25% of 5V). With half obligation cycle the normal esteem is 2.5V, and if the obligation cycle is 75%, the normal voltage is 3.75V et cetera. The greatest obligation cycle can be 100%, which is proportionate to a DC waveform. In this manner by changing the beat width, we can differ the normal voltage over a DC engine and thus its speed.

Circuit Diagram

The circuit of a basic speed controller for a smaller than expected DC engine, for example, that utilized as a part of recording devices and toys, is appeared in Fig. 2.


Circuit Operation

Here N1 rearranging Schmitt trigger is arranged as an astable multivibrator with consistent period however factor obligation cycle. In spite of the fact that the aggregate in-circuit resistance of VR1 amid a total cycle is 100 kilo-ohms, the part utilized amid positive and negative times of each cycle can be fluctuated by changing the position of its wiper contact to get variable heartbeat width. Schmitt door N2 essentially goes about as a cradle/driver to drive transistor T1 amid positive invasions at its base. Hence the normal plentifulness of DC drive beats or the speed of engine M is relative to the setting of the wiper position of VR1 potmeter. Capacitor C2 fills in as a capacity capacitor to give stable voltage to the circuit.

Along these lines, by shifting VR1 the obligation cycle can be changed from 0% to 100% and the speed of the engine from “halted” condition to ‘full speed’ in an even and ceaseless way. The diodes successfully give diverse planning resistor esteems amid charging and releasing of timing capacitor C1.


The beat or rest period is roughly given by the accompanying equation:Pulse or Rest period ≈ 0.4 x C1 (Farad) x VR1 (ohm) seconds. Here, utilize the in-circuit estimation of VR1 amid heartbeat or rest period as relevant.

The recurrence will stay steady and is given by the condition:

Recurrence ≈ 2.466/(VR1.C1) ≈ 250 Hz (for VR1=100 kilo-ohms and C1=0.1 µF)

The suggested estimation of in-circuit resistance ought to be more prominent than 50 kilo-ohms yet under 2 uber ohms, while the capacitor esteem ought to be more prominent than 100 pF yet under 1 µF.

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